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EMIF10-LCD01F1
IPADTM
10 LINES EMI FILTER AND ESD PROTECTION
MAIN PRODUCT CHARACTERISTICS: Where EMI filtering in ESD sensitive equipment is required : LCD for Mobile phones Computers and printers Communication systems MCU Boards DESCRIPTION The EMIF10-LCD01F1 is a 10 lines highly integrated devices designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interferences. The EMIF10 flip chip packaging means the package size is equal to the die size. This filter includes an ESD protection circuitry, which prevents the device from destruction when subjected to ESD surges up 15kV.
s s s s
Flip Chip package PIN CONFIGURATION (ball side)
BENEFITS EMI symmetrical (I/O) low-pass filter High efficiency in EMI filtering Very low PCB space consuming: 2.64mm x 2.64mm Very thin package: 0.65 mm High efficiency in ESD suppression on input pins (IEC6100-4-2 level 4) High reliability offered by monolithic integration High reducing of parasitic elements through integration & wafer level packaging.
s s s s s s s
5
I5 I10
GND
4
I4 I9
GND
3
I3 I8
GND
2
I2 I7
GND
1
I1 I6
GND
A B C D E
O10 O5
O9 O4
O8 O3
O7 O2
O6 O1
COMPLIES WITH THE FOLLOWING STANDARDS: IEC61000-4-2 Level 4 input pins 15kV (air discharge) 8 kV (contact discharge) Level 1 output pins 2kV (air discharge) 2kV (contact discharge) MIL STD 883E - Method 3015-6 Class 3 BASIC CELL CONFIGURATION
Low-pass Filter
Input
Output
Ri/o = 100 Cline = 35pF
GND
TM : IPAD is a trademark of STMicroelectronics.
GND
GND
November 2003 - Ed: 2A
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EMIF10-LCD01F1
ABSOLUTE MAXIMUM RATINGS (Tamb = 25 C) Symbol Tj Top Tstg Parameter and test conditions Maximum junction temperature Operating temperature range Storage temperature range Value 125 -40 to + 85 -55 to +150 Unit C C C
ELECTRICAL CHARACTERISTICS (Tamb = 25C) Symbol VBR IRM VRM VCL Rd IPP RI/O Cline Parameters Breakdown voltage Leakage current @ VRM Stand-off voltage Clamping voltage Dynamic impedance Peak pulse current Series resistance between Input & Output Input capacitance per line
IPP VCL VBR VRM IRM IR VF V I
IF
Symbol VBR IRM RI/O Cline Rt / Ft At 0V bias IR = 1mA VRM = 3V
Test conditions
Min 6 90
Typ 8 100 8
(1)
Max 10 500 110 35
Unit V nA pF ns
Induced rise and fall time 10-90% at 26 MHz frequency signal V = 1.9 V (Rt / Ft input 1 ns, 50 impedance generator)
(1) guaranteed by design
Fig. 1: S21(dB) all lines attenuation measurement and Aplac simulation.
Fig. 2: Analog crosstalk measurements.
2/6
EMIF10-LCD01F1
Fig. 3: ESD response to IEC61000-4-2 (+15kV air discharge) on one input and one output. Fig. 4: ESD response to IEC61000-4-2 (-15kV air discharge) on one input and one output.
Vin
Vout
Fig. 5: Line capacitance versus applied voltage.
Fig. 6: Rise time 10-90% measurements with 1.9V signal at 26 MHz frequency (50 generator).
CLine(pF) 35 30 25 20 15 10 5 0 0.0 1.0
VLine(V) 2.0 3.0 4.0 5.0
Fig. 7: Fall time 10-90% measurements with 1.9V signal at 26 MHz frequency (50 generator).
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EMIF10-LCD01F1
Aplac model.
EMIF10-LCD01F1 model
Ground return
Aplac parameters.
ZRZ structure aplacvar Remif10low 100 aplacvar Cemif10flow 17.5pF Bumps aplacvar Lbump 50pH aplacvar Rbump 20m aplacvar Cbump 1.5pF Bulk aplacvar Rsub 100m Gnd connections aplacvar Rgnd 100m aplacvar Lgnd 200pH aplacvar Cgnd 0.15pF
BV = 7 CJO = Cemif10low IBV = 1u IKF = 1000 IS = 10f ISR = 100p N=1 M = 0.3333 RS = 0.015 VJ = 0.6 TT = 50n
ORDER CODE
EMIF
EMI Filter Number of lines
yy
-
xxx
zz
F
x
1: Pitch = 500m Bump = 315m 2: Leadfree Pitch = 500m Bump = 315m 3: Leadfree Pitch = 400m Bump = 250m 4: Pitch = 500m Bump = 250m Flip Chip
x: resistance value (Ohms) z: capacitance value / 10(pF) or Application (3 letters) and Version (2 digits)
4/6
EMIF10-LCD01F1
PACKAGE MECHANICAL DATA FLIP CHIP
500m 50 500m 50 315m 50 650m 65
2.64mm 50m
2.64mm 50m
250m 40
FOOT PRINT RECOMMENDATIONS
Copper pad Diameter : 250m recommended , 300m max
Solder stencil opening : 330m
Solder mask opening recommendation : 340m min for 315m copper pad diameter
MARKING
Dot, ST logo xxx = marking yww = datecode (y = year ww = week)
545 545
400
xxx y ww
100
230
All dimensions in m
5/6
EMIF10-LCD01F1
PACKING
Dot identifying Pin A1 location 4 +/- 0.1 O 1.5 +/- 0.1 1.75 +/- 0.1 3.5 +/- 0.1
0.73 +/- 0.05
All dimensions in mm
8 +/- 0.3
ST
ST
ST
xxx yww
User direction of unreeling
xxx yww
xxx yww
4 +/- 0.1
OTHER INFORMATION Ordering code EMIF10-LCD01F1 Marking FLT Package Flip Chip Weight 9.3 mg Base qty 5000 Delivery mode Tape & reel (7")
Note: More information are available in the application notes: - AN1235: ''Flip-Chip: Package description and recommandations for use'' - AN1751: "EMI Filters: Recommendations and measurements"
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2003 STMicroelectronics - All rights reserved. STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain Sweden - Switzerland - United Kingdom - United States www.st.com 6/6


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